A.D. (Ajay) Shetgaonkar
A.D. (Ajay) Shetgaonkar
Profile
Ajay Shetgaonkar (Graduate Student Member, IEEE) was born on September 17th, 1993 in Goa, India. He received a B.E. degree in electrical and electronic engineering from Goa College of Engineering, Goa, India, in 2016. In 2020, he received an M.Sc. degree in electrical power engineering from the Delft University of Technology, the Netherlands (graduated “cum laude”, equivalent to maximum honors). He is currently working toward a Ph.D. degree at the Delft University of Technology, the Netherlands. His research interests include future power system dynamics and stability, integration of renewable energy resources, modeling of HVDC breakers, and design of advanced protection and control systems for modular multilevel converter-based HVDC systems in the HVDC electrical grid. He is also a student member of CIGRE.
Expertise
Publications
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2024
Enhanced Real-Time Multi-Terminal HVDC Power System Benchmark Models with Performance Evaluation Strategies
A. Shetgaonkar / T. Karmokar / M. Popov / A. Lekić
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2023
Interoperability of classical and advanced controllers in MMC based MTDC power system
L. Liu / A.D. Shetgaonkar / A. Lekic
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2023
Model predictive control and protection of MMC-based MTDC power systems
Ajay Shetgaonkar / Le Liu / Aleksandra Lekić / Marjan Popov / Peter Palensky
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2023
Post DC Fault Circulating Current Suppression Control
Rohan Kamat Tarcar / Ajay Shetgaonkar / Marjan Popov / Mart Van Der Meijden / Wilhelm Winter / Mario Ndreko / Robert Dimitrovski / Matthias Burkhardt / Aleksandra Lekić
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2023
Two-layer control structure for enhancing frequency stability of the MTDC system
Jelena Stojković / Ajay Shetgaonkar / Predrag Stefanov / Aleksandra Lekić
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Ancillary activities
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2022-09-01 - 2024-09-01