Alumni
Graduated PhD students
| Name | Thesis Title | First Job | Year |
|---|---|---|---|
| R. Choupani | Scalable video coding | Cankaya University | 2017 |
| N. Cucu Laurenciu | Reliability aware computing platforms design and lifetime management | TU Delft | 2017 |
| I. Ashraf | Communication driven mapping of applications on multicore platforms | TU Delft | 2016 |
| M. Enachescu | Hybrid NEMS-CMOS Architectures for Ultra Low Power Smart Systems | Microchip Technology, Bucharest, Romania | 2016 |
| M. Cortez | Reliability assessment and test methods for anti-counterfeiting technology | Riscure, Delft, The Netherlands | 2015 |
| H. Mushtaq | Deterministic execution of multithreaded applications for reliability of multicore systems | TU Delft | 2015 |
| C. Chen | Towards dependable network-on-chip architectures | NUDT, China | 2015 |
| C. Pham-Quoc | Hybrid interconnect design for heterogeneous hardware accelerators | Ho Chi Minh City University of Technology | 2015 |
| A. Nelson | Composable and predictable power management | TU/e | 2014 |
| A. Beyranvand Nejad | Composable virtual platforms for mixed-criticality embedded systems | ASML NL | 2014 |
| P. Zaykov | Multithreading for embedded reconfigurable mulitcore systems | Honeywell | 2014 |
| K. Chandrasekar | High-level power estimation and optimization of DRAMs | NVIDIA, Bengaluru, Karnataka, India | 2014 |
| M. Taouil | Yield and cost analysis for 3D stacked ICs | TU Delft | 2014 |
| M. Nadeem | Adaptive, low-power architectures for embedded multimedia systems: with focus on H.264/AVC video codec | 2014 | |
| R. Nane | Automatic hardware generation for reconfigurable architectures | TUDelft | 2014 |
| D. Mirzoyan | Better than worst-case design for streaming applications under process variation | Omron Electronic Components Europe B.V., The Netherlands | 2013 |
| Seyab | Bias temperature instability analysis, monitoring and mitigation for nano-scaled circuits | NWFP University of Engineering and Technology Peshawar Pakistan | 2013 |
| Y. Wang | Aging assessment and reliability aware omputing platforms | NUDT, China | 2013 |
| F. Anjam | Run-time adaptable VLIW processors -- resources, performance, power consumption, and reliability trade-offs | University of Science & Technology, Bannu, Pakistan | 2013 |
| M.F. Nadeem | Evaluation framework for task scheduling algorithms in distributed reconfigurable systems | 2013 | |
| C.B. Ciobanu | Customizable Register Files for Multidimensional SIMD Architectures | Chalmers University of Technology | 2013 |
| M. A. Wahlah | Field programmable gate arrays with hardwired networks on chip | Software engineer at Civolution (former Philips), Eindhoven, the Netherlands | 2012 |
| R. Stefan | Resource allocation in time-division-multiplexed networks on chip | Software designer, Mapper Lithography, The Hague, The Netherlands | 2012 |
| N. Z. Haron | Testability and fault tolerance for emerging nanoelectronic memories | UTeM-Universiti Teknikal Malaysia Melaka, Malaysia | 2012 |
| D. Crisu | Hardware algorithms for tile-based real-time rendering | Senior design engineer at Imagination Technologies, Hemel Hempstead, UK | 2012 |
| V. M. Sima | Compiler assisted runtime adaption | TU Delft | 2012 |
| S.A. Ostadzadeh | Quantitative Application Data Flow Characterization for Heterogeneous Multicore Architectures | TU Delft | 2012 |
| R.J. Meeuws | Quantitative Hardware Prediction Modeling for Hardware/Software Co-design | Bluebee | 2012 |
| L. Hasan | Hardware Acceleration of Bioinformatics Sequence Alignment Applications | Computer Systems Engineering, UET Peshawar, Pakistan | 2011 |
| C. Gou | Customizable Memory Schemes for Data Parallel Architectures | TU Delft | 2011 |
| I.S. Irobi | Analysis and Test Development for Parasitic Fails in Deep Sub-Micron Memory Devices | Enercom Canada, Ottawa, Canada | 2011 |
| Y. Lu | Realistic Online Resource Management for Partially Reconfigurable Systems | ASML | 2011 |
| T. Marconi | Efficient Runtime Management of Reconfigurable Hardware Resources | NUS, Singapore | 2011 |
| D. Ludovici | Technology Aware Network-on-Chip Connectivity and Synchronization Design | Ariston, Italy | 2011 |
| A. Azevedo | Efficient Execution of Video Applications on Heterogeneous Multi- and Many-Core Processors | TU Delft | 2011 |
| O.S. Dragomir | K-loops: Loop Transformations for Reconfigurable Architectures | TBA Netherlands, The Netherlands | 2011 |
| D. Theodoropoulos | Custom Architecture for Immersive-Audio Applications | TU Crete | 2011 |
| M. Sabeghi | Runtime Support for Heterogeneous Multi-core Systems | ASML | 2011 |
| C. Strydis | Universal Processor Architecture for Biomedical Implants: The SiMS Project | TU Delft/Erasmus MC | 2011 |
| J.Y. Hur | Customizing and Hardwiring On-chip Interconnects in FPGAs | Samsung, S. Korea | 2011 |
| K Sigdel | System-Level Design Space Exploration of Reconfigurable Architectures | TU Delft | 2011 |
| S. Isaza | Multicore Architectures for Bioinformatics Applications | Erasmus MC | 2011 |
| Z. Nawaz | Recursive Variable Expansion a transformation for Reconfigurable Computing | University of the Punjab Lahore, Pakistan | 2011 |
| C.H. Meenderinck | Improving the Scalability of Multicore Systems, with a Focus on H.264 Video Decoding | TU Delft | 2010 |
| M. Ahmadi | High-performance Processing in Networked and Grid Environments | Lecturer | 2010 |
| A. Gbolagade | Effective Reverse Conversion in Residue Number System Processors | University for Development Studies, Nigeria | 2010 |
| T. Abdullah | Mechanisms for Self-organizing Ad Hoc Grids | 2010 | |
| D. Borodin | Performance-Oriented Fault Tolerance in Computing Systems | TU Delft | 2010 |
| C. Galuzzi | Automatically Fused Instructions | TU Delft | 2009 |
| B. Pourebrahimi | An Economic Framework for Resource Allocation in Ad-hoc Grids | TU Delft | 2009 |
| P.J. de Langen | Energy Reduction Techniques for Caches and Multiprocessors | TomTom | 2009 |
| A. Molnos | Task Centric Memory Management for an On-Chip Multiprocessor | CEA LETI, France | 2009 |
| A. Shahbahrami | Avoiding Conversion and Rearrangement Overhead in SIMD Architectures | Professor Iran | 2008 |
| F. Duarte | A cache-based hardware accelerator for memory data movements | ESA | 2008 |
| G.N. Gaydadjiev | Testing of Modern Semiconductor Memory Structures | TU Delft | 2007 |
| E. Moscu Panainte | The Molen Compiler for Reconfigurable Architectures | TU Delft | 2007 |
| C. Kachris | Reconfigurable Network Processing Platforms | FORTH, Greece | 2007 |
| I. Sourdis | Designs and Algorithms for Packet and Content Inspection | TU Delft | 2007 |
| R. Chaves | Secure Computing on Reconfigurable Systems | INESC-ID, Portugal | 2007 |