Prof.dr. R.B. Staszewski

vakken
2009 - Digital RF
2010 - Digital RF
2011 - Digital RF
2014 - Digital RF
2012 - Digital RF
2013 - Digital RF
nevenwerkzaamheden
-Adviseur/Consultant - TSMC

2015-07-01 - 2017-07-01

Informatie en communicatie

publicaties
An Ultracompact 9.4–14.8-GHz Transformer-Based Fractional-N All-Digital PLL in 40-nm CMOS

peer reviewed : Y

IEEE Transactions on Microwave Theory and Techniques (2017) 14 pagina's , p. 1-14

auteurs

  • Augusto Ronchini Ximenes
  • Gerasimos Vlachogiannakis
  • Bogdan Staszewski
A 3.5-6.8-GHz Wide-Bandwidth DTC-Assisted Fractional-N All-Digital PLL With a MASH ΔΣ-TDC for Low In-Band Phase Noise

peer reviewed : Y

IEEE Journal of Solid State Circuits (2017) 19 pagina's , p. 1-19

auteurs

  • Ying Wu
  • Mina Shahmohammadi
  • Yue Chen
  • Ping Lu
  • R. B. Staszewski
An Ultra-Low Power 1.7-2.7 GHz Fractional-N Sub-Sampling Digital Frequency Synthesizer and Modulator for IoT Applications in 40 nm CMOS

peer reviewed : Y

IEEE Transactions on Circuits and Systems Part 1: Regular Papers (2016) 12 pagina's , p. 1-12

auteurs

  • Y. H. Liu
  • Johan van den Heuvel
  • Takashi Kuramochi
  • Benjamin Busze
  • Paul Mateman
  • Vamshi Krishna Chillara
  • Bindi Wang
  • R. B. Staszewski
  • Kathleen Philips
A Fully Integrated Discrete-Time Superheterodyne Receiver

peer reviewed : Y

IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2016) 13 pagina's , p. 635-647

auteurs

  • M. Tohidian
  • I. Madadi
  • R.B. Staszewski
A 0.034mm2, 725fs RMS jitter, 1.8%/V frequency-pushing, 10.8 #x2013;19.3GHz transformer-based fractional-N all-digital PLL in 10nm FinFET CMOS

peer reviewed : Y

2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits) (2016) 2 pagina's , p. 1-2

auteurs

  • C.C. Li
  • T.H. Tsai
  • M.S. Yuan
  • C.C. Liao
  • C.H. Chang
  • T.C. Huang
  • H.Y. Liao
  • C.T. Lu
  • H.Y. Kuo
  • K. Hsieh
  • M Chen
  • A. Ronchini Ximenes
  • R. B. Staszewski
A Bluetooth low-energy (BLE) transceiver with TX/RX switchable on-chip matching network, 2.75mW high-IF discrete-time receiver, and 3.6mW all-digital transmitter

peer reviewed : Y

2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits) (2016) 2 pagina's , p. 1-2

auteurs

  • F. W. Kuo
  • Sandro Binsfeld Ferreira
  • M. Babaie
  • R. Chen
  • L. C. Cho
  • C. P. Jou
  • F. L. Hsueh
  • G. Huang
  • I. Madadi
  • M. Tohidian
  • R. B. Staszewski
A Digitally Controlled Injection-Locked Oscillator with Fine Frequency Resolution

peer reviewed : Y

IEEE Journal of Solid State Circuits (2016) 14 pagina's , p. 1347-1360

auteurs

  • I Bashir
  • Bogdan Staszewski
  • Poras T. Balsara
A 60 GHz Frequency Generator Based on a 20 GHz Oscillator and an Implicit Multiplier

peer reviewed : Y

IEEE Journal of Solid State Circuits (2016) 13 pagina's , p. 1261-1273

auteurs

  • Z. Zong
  • M. Babaie
  • R. B. Staszewski
Analysis and Design of a Multi-Core Oscillator for Ultra-Low Phase Noise

peer reviewed : Y

IEEE Transactions on Circuits and Systems Part 1: Regular Papers (2016) 11 pagina's , p. 529-539

auteurs

  • S. A. R. Ahmadi-Mehr
  • M. Tohidian
  • R. B. Staszewski
A 1/f Noise Upconversion Reduction Technique for Voltage-Biased RF CMOS Oscillators

peer reviewed : Y

IEEE Journal of Solid State Circuits (2016) 15 pagina's , p. 2610-2624

auteurs

  • Mina Shahmohammadi
  • Masoud Babaie
  • Robert Bogdan Staszewski