Joost Hoozemans
PhD student at the Computer Engineering Group of the Faculty of Engineering, Mathematics and Computer Science (EEMCS/EWI), Delft University of Technology.
Through the ALMARVI European research project ( www.almarvi.eu ), I am working on the rVEX reconfigurable VLIW softcore:
The rVEX is one of the ALMARVI execution platforms, representing multiple points in a spectrum of highly flexible general-purpose processors (by means of its dynamic run-time adaptability), and highly optimized platforms for specific applications (by means of its design-time reconfigurability). For example, we have developed an FPGA overlay fabric that targets streaming image processing workloads.
For the run-time adaptible processor, I am working on ILP-driven configuration scheduling techniques. The final goal of the rVEX platform is to continuously optimize its hardware configuration to the running tasks. I am working on different approaches of using ILP information to guide these reconfigurations. The ILP information can be acquired by using run-time profiling (performance monitoring) or by analyzing code and annotating binaries during compilation.
The rVEX does not just consist of a processor prototype; it is a complete platform with compilers, a complete toolchain including binutils and runtime libraries, a fast architectural simulator, ucLinux (nommu) support, debugging hardware and tools, several example and test programs and of course the VHDL code of the processor.
It is available for researchers and enthusiasts that are interested in VLIW architecture under an academic license. The platform has matured considerably over the last few years and I believe it is the best VLIW platform available and provides a running start in this field.
The rVEX is a team effort, where some examples of my contributions are:
-Porting the 2.0 nommu Linux kernel from uCLinux (my MSc graduation work) and adding support for Position-Independent Code to our toolchain through the Flat binary format
-Porting the Open64 compiler and a number of runtime libraries from STMicroelectronics' st200/Lx architecture to VEX
-Porting newlib (a simple C standard library)
-Heavily modifying the st200 architectural simulator and implementing all dynamic capabilities, control registers and other characteristics into what is now called simrvex
I have been involved in teaching the following courses:
- Reconfigurable Computing Design (ET4370) 2013
- Reconfigurable Computing Design (ET4370) 2015
- Computer Architecture: Special Topics (ET4078) 2013
- Computer Architecture: Special Topics (ET4078) 2014
- ET8030 (Operating Systems Project - individual students)
- Modern/Embedded Computer Architectures (MCA/ECA: ET4074/IN4340) 2014
- Modern/Embedded Computer Architectures (MCA/ECA: ET4074/IN4340) 2015
- Modern Computer Architectures (MCA: ET4074) 2016
Additionally, I have had the pleasure of working with these students for their MSc theses;
- Muez Reda (Intel)
- Klaas Meun (Royal Dutch Navy)
- Jens Johansen (SRON)
- Rolf Heij (Alten)
- Koray Yanik (Maxeller)
- Muneeb Yousaf(returned to Pakistan as per his exchange funding program)
- Hugo van der Wijst (Tesla)
- Jeroen van Straten (Now my colleague at TUD)
- Panagiotis (Panos) Mitsis (ASML)
Lastly, I have aided these BSc students in their rVEX-related honours track project:
- Tom aan de Wiel
- Piet de Vaere
- Matti Dreef
